1. Field
Example embodiments relate to a memory device, a method of fabricating the same, and/or an operation method thereof, and for example, to a multi-bit electro-mechanical memory device in which desired, or alternatively, predetermined data are written and/or read by a switching operation of a plurality of cantilever electrodes formed symmetrically to each other centering a trench, a method of fabricating the same, and/or an operation method thereof.
2. Description of Related Art
Memory devices used for storing data may be classified as volatile memory devices and non-volatile memory devices. Examples of conventional volatile memory devices include a dynamic random access memory (DRAM) and a static random access memory (SRAM). A volatile memory device is faster in an operation speed of inputting/outputting data, but loses stored data if the power supply is discontinued. Examples of conventional non-volatile semiconductor memory devices include an erasable programmable read only memory (EPROM) and an electrically erasable programmable read only memory (EEPROM). A non-volatile semiconductor memory device is slower in the operation speed of inputting/outputting data, but maintains stored data even if the power supply is discontinued.
A conventional memory device has been fabricated by applying a metal oxide semiconductor field effect transistor (MOSFET) based on a metal oxide semiconductor (MOS) technique. For example, a memory device of a stack gate type transistor and a memory device of a trench gate type transistor have been developed. The memory device of a stack gate type transistor has a structure stacked on a semiconductor substrate composed of silicon material. The memory device of the trench gate type transistor has a structure embedded inside the semiconductor substrate. However, to reduce a short channel effect in the MOSFET, the width and length of a channel need to be a desired, or alternatively, a predetermined amount or more, and the thickness of a gate insulating layer, which is formed between a gate electrode positioned at an upper end of the channel and a semiconductor substrate, needs to be thinner. Accordingly, the MOSFET has more difficulty in realizing a memory device in a nanoscaled ultramicro structure.
Research has been conducted to develop a memory device having a structure which is configured to substitute for the MOSFET Examples of cutting edge techniques include a micro electro-mechanical system (MEMS) technique applied to a suspend bridge memory (SBM), and a nano electro-mechanical system (NEMS) technique.
FIG. 1 is a sectional view schematically illustrating a conventional memory device.
As illustrated in FIG. 1, in a conventional memory device, a field effect transistor (FET) sensing part 221, a pull-in electrode part 223, and a cantilever electrode support part 225 are formed so as to be distinguished from one another on a shallow trench isolation (STI) layer 224 on a substrate 222. A cantilever electrode 240 having one side being supported by and electrically connected to the cantilever electrode support part 225, is formed to be spaced apart from the pull-in electrode part 223 and the FET sensing part 221 at a desired, or alternatively, a predetermined height. The cantilever electrode 240 is formed to be bent in a direction of a pull-in electrode 232 by an electric field induced in the pull-in electrode part 223. Even though the electric field induced in the pull-in electrode part 223 is removed, the cantilever electrode 240 is maintained in the bent position by the electric field induced from electrons captured in a polysilicon gate electrode 230. For example, the polysilicon gate electrode 230 corresponds to a floating electrode of a flash memory device which captures electrons tunneled through a tunnel oxide layer composed of a dielectric and formed on a source-drain region 227 of the FET sensing part 221. The pull-in electrode part 223 and the cantilever electrode support part 225 are composed of the same polysilicon material as the polysilicon gate electrode 230. The cantilever electrode 240 is composed of the polysilicon material in the cantilever electrode support part 225.
Therefore, the conventional memory device realizes the non-volatile memory device with the pull-in electrode 232 which bends the cantilever electrode 240 by an electrostatic force under the cantilever electrode 240 floating at the desired, or alternatively, the predetermined height, and the FET sensing part 221 formed to maintain the cantilever electrode 240 in the bent position.
However, in the conventional memory device, the cantilever electrode 240 formed in a direction crossing the FET sensing part 221 is disconnected at sections. Because the cantilever electrode support part 225 supporting the cantilever electrode 240 is formed to be parallel to the FET sensing part 221 on the same line, it is more difficult to configure a cell array in a matrix shape. Therefore, the integration density of the memory device decreases.
In the conventional memory device, the pull-in electrode part 223, which bends the cantilever electrode 240 from a horizontal level, and the FET sensing part 221, which maintains the cantilever electrode 240 bent by the pull-in electrode part 223 in the bent position so as to be continuously bent, need to be individually configured on the same plane level. The cantilever electrode 240 needs to be formed longer to cover the top of the pull-in electrode part 223, and FET sensing part 221. Therefore, the integration density of the memory device decreases.
The conventional memory device is formed to program/write or read only the 1-bit data per unit cell comprising the cantilever electrode 240, the pull-in electrode 232 and the FET sensing part 221. Therefore, it is more difficult for the conventional memory device to store multi-bit data.